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Silicon Labs /EFM32PG23B210F128IM48 /PCNT0_S /CMD

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Interpret as CMD

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https://regviz.com/r/Silicon Labs/EFR32MG24A010F1536GM40/PCNT0_S/CMD#0x0

31282724232019161512118743000000000000000000000000000000000000000000 (CORERST)CORERST0 (CNTRST)CNTRST0 (AUXCNTRST)AUXCNTRST0 (LCNTIM)LCNTIM0 (STARTCNT)STARTCNT0 (STARTAUXCNT)STARTAUXCNT0 (STOPCNT)STOPCNT0 (STOPAUXCNT)STOPAUXCNT

Description

No Description

Fields

CORERST

PCNT Clock Domain Reset
CNTRST

CNT Reset
AUXCNTRST

AUXCNT Reset
LCNTIM

Load CNT Immediately
STARTCNT

Start Main Counter
STARTAUXCNT

Start Aux Counter
STOPCNT

Stop Main Counter
STOPAUXCNT

Stop Aux Counter

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data